| ********** Mapped Logic ********** |
|
FDCPE_RS_TxOut: FDCPE port map (RS_TxOut,RS_TxOut_D,Clk,'0','0');
RS_TxOut_D <= ((Reset) OR (XLXI_3/iBusy AND RS_TxOut AND NOT XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND XLXI_3/sReg(1) AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND RS_TxOut AND NOT XLXI_3/Cnt(0)) OR (XLXI_3/iBusy AND RS_TxOut AND NOT XLXI_3/Cnt(1)) OR (XLXI_3/iBusy AND RS_TxOut AND NOT XLXI_3/Cnt(2)) OR (NOT XLXI_3/iBusy AND RS_TxOut AND NOT XLXN_35) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(2) AND NOT XLXI_3/sReg(3) AND NOT XLXI_3/sReg(4) AND NOT XLXI_3/sReg(5) AND NOT XLXI_3/sReg(6) AND NOT XLXI_3/sReg(7) AND NOT XLXI_3/sReg(8) AND NOT XLXI_3/sReg(9) AND RS_TxOut)); |
| FTCPE_XLXI_1/Cnt0: FTCPE port map (XLXI_1/Cnt(0),'1',NOT PS2_Clk,NOT XLXI_1/Cnt(2)/XLXI_1/Cnt(2)_RSTF__$INT,'0'); |
| FTCPE_XLXI_1/Cnt1: FTCPE port map (XLXI_1/Cnt(1),XLXI_1/Cnt(0),NOT PS2_Clk,NOT XLXI_1/Cnt(2)/XLXI_1/Cnt(2)_RSTF__$INT,'0'); |
|
FTCPE_XLXI_1/Cnt2: FTCPE port map (XLXI_1/Cnt(2),XLXI_1/Cnt_T(2),NOT PS2_Clk,NOT XLXI_1/Cnt(2)/XLXI_1/Cnt(2)_RSTF__$INT,'0');
XLXI_1/Cnt_T(2) <= (XLXI_1/Cnt(0) AND XLXI_1/Cnt(1)); |
| XLXI_1/Cnt(2)/XLXI_1/Cnt(2)_RSTF__$INT <= (NOT Reset AND NOT XLXN_2); |
|
FTCPE_XLXI_1/Cnt3: FTCPE port map (XLXI_1/Cnt(3),XLXI_1/Cnt_T(3),NOT PS2_Clk,NOT XLXI_1/Cnt(2)/XLXI_1/Cnt(2)_RSTF__$INT,'0');
XLXI_1/Cnt_T(3) <= (XLXI_1/Cnt(0) AND XLXI_1/Cnt(1) AND XLXI_1/Cnt(2)); |
| FDCPE_XLXI_1/reg10b8: FDCPE port map (XLXI_1/reg10b(8),XLXI_1/reg10b(9),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXI_1/reg10b9: FDCPE port map (XLXI_1/reg10b(9),PS2_Data,NOT PS2_Clk,'0','0'); |
|
FDCPE_XLXI_2/state_FSM_FFd1: FDCPE port map (XLXI_2/state_FSM_FFd1,XLXI_2/state_FSM_FFd1_D,Clk,'0','0');
XLXI_2/state_FSM_FFd1_D <= ((NOT Reset AND XLXI_2/state_FSM_FFd1 AND NOT XLXN_2) OR (NOT Reset AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND NOT XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND NOT XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND NOT XLXN_1(3) AND XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND NOT XLXN_1(3) AND XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND NOT XLXI_2/state_FSM_FFd2 AND XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5))); |
|
FDCPE_XLXI_2/state_FSM_FFd2: FDCPE port map (XLXI_2/state_FSM_FFd2,XLXI_2/state_FSM_FFd2_D,Clk,'0','0');
XLXI_2/state_FSM_FFd2_D <= ((NOT Reset AND XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND NOT XLXI_2/state_FSM_FFd1 AND NOT XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_2) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND NOT XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND NOT XLXI_2/state_FSM_FFd1 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND NOT XLXN_1(3) AND XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5))); |
|
FDCPE_XLXI_2/state_FSM_FFd3: FDCPE port map (XLXI_2/state_FSM_FFd3,XLXI_2/state_FSM_FFd3_D,Clk,'0','0');
XLXI_2/state_FSM_FFd3_D <= ((NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND NOT XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND NOT XLXI_2/state_FSM_FFd1 AND NOT XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND NOT XLXN_1(3) AND XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXN_2) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND NOT XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND NOT XLXN_1(3) AND XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND NOT XLXI_2/state_FSM_FFd1 AND NOT XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5))); |
|
FDCPE_XLXI_2/state_FSM_FFd4: FDCPE port map (XLXI_2/state_FSM_FFd4,XLXI_2/state_FSM_FFd4_D,Clk,'0','0');
XLXI_2/state_FSM_FFd4_D <= ((EXP13_.EXP) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND NOT XLXN_1(0) AND XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND NOT XLXN_1(3) AND XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND XLXN_1(0) AND NOT XLXN_1(6) AND XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND NOT XLXN_1(2) AND XLXN_1(4) AND XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd3 AND NOT XLXI_2/state_FSM_FFd1 AND NOT XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd4 AND NOT XLXI_2/state_FSM_FFd1 AND NOT XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd4 AND NOT XLXN_2) OR (NOT Reset AND NOT XLXI_2/state_FSM_FFd3 AND XLXI_2/state_FSM_FFd4 AND XLXI_2/state_FSM_FFd1 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND XLXN_1(4) AND NOT XLXN_1(5)) OR (NOT Reset AND XLXI_2/state_FSM_FFd1 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_1(0) AND NOT XLXN_1(6) AND NOT XLXN_1(1) AND XLXN_2 AND XLXN_1(3) AND NOT XLXN_1(7) AND XLXN_1(2) AND XLXN_1(4) AND NOT XLXN_1(5))); |
|
FDCPE_XLXI_3/Cnt0: FDCPE port map (XLXI_3/Cnt(0),XLXI_3/Cnt_D(0),Clk,'0','0');
XLXI_3/Cnt_D(0) <= (XLXI_3/iBusy AND NOT Reset AND NOT XLXI_3/Cnt(0)); |
|
FDCPE_XLXI_3/Cnt1: FDCPE port map (XLXI_3/Cnt(1),XLXI_3/Cnt_D(1),Clk,'0','0');
XLXI_3/Cnt_D(1) <= ((XLXI_3/iBusy AND NOT Reset AND XLXI_3/Cnt(0) AND NOT XLXI_3/Cnt(1)) OR (XLXI_3/iBusy AND NOT Reset AND NOT XLXI_3/Cnt(0) AND XLXI_3/Cnt(1))); |
|
FDCPE_XLXI_3/Cnt2: FDCPE port map (XLXI_3/Cnt(2),XLXI_3/Cnt_D(2),Clk,'0','0');
XLXI_3/Cnt_D(2) <= ((XLXI_3/iBusy AND NOT Reset AND NOT XLXI_3/Cnt(0) AND XLXI_3/Cnt(2)) OR (XLXI_3/iBusy AND NOT Reset AND NOT XLXI_3/Cnt(1) AND XLXI_3/Cnt(2)) OR (XLXI_3/iBusy AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND NOT XLXI_3/Cnt(2))); |
|
FTCPE_XLXI_3/Cnt3: FTCPE port map (XLXI_3/Cnt(3),XLXI_3/Cnt_T(3),Clk,'0','0');
XLXI_3/Cnt_T(3) <= ((NOT XLXI_3/iBusy AND XLXI_3/Cnt(3)) OR (Reset AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2))); |
|
FDCPE_XLXI_3/iBusy: FDCPE port map (XLXI_3/iBusy,XLXI_3/iBusy_D,Clk,'0','0');
XLXI_3/iBusy_D <= ((Reset) OR (NOT XLXI_3/iBusy AND NOT XLXN_35) OR (NOT XLXI_3/sReg(1) AND NOT XLXI_3/sReg(2) AND NOT XLXI_3/sReg(3) AND NOT XLXI_3/sReg(4) AND NOT XLXI_3/sReg(5) AND NOT XLXI_3/sReg(6) AND NOT XLXI_3/sReg(7) AND NOT XLXI_3/sReg(8) AND NOT XLXI_3/sReg(9) AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
|
FTCPE_XLXI_3/sReg1: FTCPE port map (XLXI_3/sReg(1),XLXI_3/sReg_T(1),Clk,'0','0');
XLXI_3/sReg_T(1) <= ((NOT XLXI_3/iBusy AND NOT XLXI_3/sReg(1) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(1) AND NOT XLXI_3/sReg(2) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(1) AND XLXI_3/sReg(2) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
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FTCPE_XLXI_3/sReg2: FTCPE port map (XLXI_3/sReg(2),XLXI_3/sReg_T(2),Clk,'0','0');
XLXI_3/sReg_T(2) <= ((NOT XLXI_3/iBusy AND NOT XLXI_3/sReg(2) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(2) AND NOT XLXI_3/sReg(3) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(2) AND XLXI_3/sReg(3) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
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FTCPE_XLXI_3/sReg3: FTCPE port map (XLXI_3/sReg(3),XLXI_3/sReg_T(3),Clk,'0','0');
XLXI_3/sReg_T(3) <= ((NOT XLXI_3/iBusy AND NOT XLXI_3/sReg(3) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(3) AND NOT XLXI_3/sReg(4) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(3) AND XLXI_3/sReg(4) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
|
FTCPE_XLXI_3/sReg4: FTCPE port map (XLXI_3/sReg(4),XLXI_3/sReg_T(4),Clk,'0','0');
XLXI_3/sReg_T(4) <= ((NOT XLXI_3/iBusy AND NOT XLXI_3/sReg(4) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(4) AND NOT XLXI_3/sReg(5) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(4) AND XLXI_3/sReg(5) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
|
FTCPE_XLXI_3/sReg5: FTCPE port map (XLXI_3/sReg(5),XLXI_3/sReg_T(5),Clk,'0','0');
XLXI_3/sReg_T(5) <= ((NOT XLXI_3/iBusy AND XLXI_3/sReg(5) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(5) AND NOT XLXI_3/sReg(6) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(5) AND XLXI_3/sReg(6) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
|
FTCPE_XLXI_3/sReg6: FTCPE port map (XLXI_3/sReg(6),XLXI_3/sReg_T(6),Clk,'0','0');
XLXI_3/sReg_T(6) <= ((NOT XLXI_3/iBusy AND XLXI_3/sReg(6) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(6) AND NOT XLXI_3/sReg(7) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(6) AND XLXI_3/sReg(7) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
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FTCPE_XLXI_3/sReg7: FTCPE port map (XLXI_3/sReg(7),XLXI_3/sReg_T(7),Clk,'0','0');
XLXI_3/sReg_T(7) <= ((NOT XLXI_3/iBusy AND NOT XLXI_3/sReg(7) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(7) AND NOT XLXI_3/sReg(8) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(7) AND XLXI_3/sReg(8) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
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FTCPE_XLXI_3/sReg8: FTCPE port map (XLXI_3/sReg(8),XLXI_3/sReg_T(8),Clk,'0','0');
XLXI_3/sReg_T(8) <= ((NOT XLXI_3/iBusy AND XLXI_3/sReg(8) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(8) AND NOT XLXI_3/sReg(9) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3)) OR (XLXI_3/iBusy AND NOT XLXI_3/sReg(8) AND XLXI_3/sReg(9) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
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FTCPE_XLXI_3/sReg9: FTCPE port map (XLXI_3/sReg(9),XLXI_3/sReg_T(9),Clk,'0','0');
XLXI_3/sReg_T(9) <= ((NOT XLXI_3/iBusy AND NOT XLXI_3/sReg(9) AND NOT Reset AND XLXN_35) OR (XLXI_3/iBusy AND XLXI_3/sReg(9) AND NOT Reset AND XLXI_3/Cnt(0) AND XLXI_3/Cnt(1) AND XLXI_3/Cnt(2) AND XLXI_3/Cnt(3))); |
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FDCPE_XLXI_79/state_FSM_FFd1: FDCPE port map (XLXI_79/state_FSM_FFd1,XLXI_79/state_FSM_FFd1_D,Clk,'0','0');
XLXI_79/state_FSM_FFd1_D <= ((NOT Reset AND XLXN_35) OR (NOT Reset AND XLXI_2/state_FSM_FFd1 AND XLXI_2/state_FSM_FFd2 AND XLXI_79/state_FSM_FFd1)); |
| FDCPE_XLXN_10: FDCPE port map (XLXN_1(0),XLXN_1(1),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_11: FDCPE port map (XLXN_1(1),XLXN_1(2),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_12: FDCPE port map (XLXN_1(2),XLXN_1(3),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_13: FDCPE port map (XLXN_1(3),XLXN_1(4),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_14: FDCPE port map (XLXN_1(4),XLXN_1(5),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_15: FDCPE port map (XLXN_1(5),XLXN_1(6),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_16: FDCPE port map (XLXN_1(6),XLXN_1(7),NOT PS2_Clk,'0','0'); |
| FDCPE_XLXN_17: FDCPE port map (XLXN_1(7),XLXI_1/reg10b(8),NOT PS2_Clk,'0','0'); |
|
FDCPE_XLXN_2: FDCPE port map (XLXN_2,XLXN_2_D,Clk,'0','0');
XLXN_2_D <= (XLXI_1/Cnt(0) AND XLXI_1/Cnt(1) AND NOT XLXI_1/Cnt(2) AND XLXI_1/Cnt(3)); |
|
FDCPE_XLXN_35: FDCPE port map (XLXN_35,XLXN_35_D,Clk,'0','0');
XLXN_35_D <= (NOT Reset AND XLXI_2/state_FSM_FFd1 AND XLXI_2/state_FSM_FFd2 AND NOT XLXN_35 AND NOT XLXI_79/state_FSM_FFd1); |
| y <= (XLXI_2/state_FSM_FFd1 AND XLXI_2/state_FSM_FFd2); |
|
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); |